1/*-
  2 * SPDX-License-Identifier: BSD-2-Clause
  3 *
  4 * Copyright (c) 2010 Spectra Logic Corporation
  5 * All rights reserved.
  6 *
  7 * Redistribution and use in source and binary forms, with or without
  8 * modification, are permitted provided that the following conditions
  9 * are met:
 10 * 1. Redistributions of source code must retain the above copyright
 11 *    notice, this list of conditions, and the following disclaimer,
 12 *    without modification.
 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
 14 *    substantially similar to the "NO WARRANTY" disclaimer below
 15 *    ("Disclaimer") and any redistribution must be conditioned upon
 16 *    including a substantially similar Disclaimer requirement for further
 17 *    binary redistribution.
 18 *
 19 * NO WARRANTY
 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 24 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 28 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
 29 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 30 * POSSIBILITY OF SUCH DAMAGES.
 31 *
 32 * $Id: //depot/users/kenm/FreeBSD-test/sys/cam/scsi/smp_all.h#4 $
 33 */
 34
 35/*
 36 * Serial Management Protocol definitions.
 37 */
 38
 39#ifndef	_SCSI_SMP_ALL_H
 40#define	_SCSI_SMP_ALL_H	1
 41
 42#define	SMP_FRAME_TYPE_REQUEST	0x40
 43#define	SMP_FRAME_TYPE_RESPONSE	0x41
 44#define	SMP_WORD_LEN		4
 45#define	SMP_CRC_LEN		4
 46
 47/*
 48 * SMP Functions (current as of SPL Revision 7)
 49 */
 50/* 0x00 to 0x7f: SMP input functions */
 51/* 0x00 to 0x0f: General SMP input functions */
 52#define	SMP_FUNC_REPORT_GENERAL		0x00
 53#define	SMP_FUNC_REPORT_MANUF_INFO	0x01
 54#define	SMP_FUNC_REPORT_SC_STATUS	0x03
 55#define	SMP_FUNC_REPORT_ZONE_PERM_TBL	0x04
 56#define	SMP_FUNC_REPORT_ZONE_MAN_PWD	0x05
 57#define	SMP_FUNC_REPORT_BROADCAST	0x06
 58
 59/* 0x10 to 0x1f: Phy-based SMP input functions */
 60#define	SMP_FUNC_DISCOVER		0x10
 61#define	SMP_FUNC_REPORT_PHY_ERR_LOG	0x11
 62#define	SMP_FUNC_REPORT_PHY_SATA	0x12
 63#define	SMP_FUNC_REPORT_ROUTE_INFO	0x13
 64#define	SMP_FUNC_REPORT_PHY_EVENT	0x14
 65
 66/* 0x20 to 0x2f: Descriptor list-based SMP input functions */
 67#define	SMP_FUNC_DISCOVER_LIST		0x20
 68#define	SMP_FUNC_REPORT_PHY_EVENT_LIST	0x21
 69#define	SMP_FUNC_REPORT_EXP_RTL		0x22
 70
 71/* 0x30 to 0x3f: Reserved for SMP input functions */
 72/* 0x40 to 0x7f: Vendor specific */
 73
 74/* 0x80 to 0xff: SMP output functions */
 75/* 0x80 to 0x8f: General SMP output functions */
 76#define	SMP_FUNC_CONFIG_GENERAL		0x80
 77#define	SMP_FUNC_ENABLE_DISABLE_ZONING	0x81
 78#define	SMP_FUNC_ZONED_BROADCAST	0x85
 79#define	SMP_FUNC_ZONE_LOCK		0x86
 80#define	SMP_FUNC_ZONE_ACTIVATE		0x87
 81#define	SMP_FUNC_ZONE_UNLOCK		0x88
 82#define	SMP_FUNC_CONFIG_ZM_PWD		0x89
 83#define	SMP_FUNC_CONFIG_ZONE_PHY_INFO	0x8a
 84#define	SMP_FUNC_CONFIG_ZONE_PERM_TBL	0x8b
 85
 86/* 0x90 to 0x9f: Phy-based SMP output functions */
 87#define	SMP_FUNC_CONFIG_ROUTE_INFO	0x90
 88#define	SMP_FUNC_PHY_CONTROL		0x91
 89#define	SMP_FUNC_PHY_TEST_FUNC		0x92
 90#define	SMP_FUNC_CONFIG_PHY_EVENT	0x93
 91
 92/* 0xa0 to 0xbf: Reserved for SMP output functions */
 93/* 0xc0 to 0xff: Vendor specific */
 94
 95/*
 96 * Function Results (current as of SPL Revision 7)
 97 */
 98#define	SMP_FR_ACCEPTED			0x00
 99#define	SMP_FR_UNKNOWN_FUNC		0x01
100#define	SMP_FR_FUNCTION_FAILED		0x02
101#define	SMP_FR_INVALID_REQ_FRAME_LEN	0x03
102#define	SMP_FR_INVALID_EXP_CHG_CNT	0x04
103#define	SMP_FR_BUSY			0x05
104#define	SMP_FR_INCOMPLETE_DESC_LIST	0x06
105#define	SMP_FR_PHY_DOES_NOT_EXIST	0x10
106#define	SMP_FR_INDEX_DOES_NOT_EXIST	0x11
107#define	SMP_FR_PHY_DOES_NOT_SUP_SATA	0x12
108#define	SMP_FR_UNKNOWN_PHY_OP		0x13
109#define	SMP_FR_UNKNOWN_PHY_TEST_FUNC	0x14
110#define	SMP_FR_PHY_TEST_FUNC_INPROG	0x15
111#define	SMP_FR_PHY_VACANT		0x16
112#define	SMP_FR_UNKNOWN_PHY_EVENT_SRC	0x17
113#define	SMP_FR_UNKNOWN_DESC_TYPE	0x18
114#define	SMP_FR_UNKNOWN_PHY_FILTER	0x19
115#define	SMP_FR_AFFILIATION_VIOLATION	0x1a
116#define	SMP_FR_SMP_ZONE_VIOLATION	0x20
117#define	SMP_FR_NO_MGMT_ACCESS_RIGHTS	0x21
118#define	SMP_FR_UNKNOWN_ED_ZONING_VAL	0x22
119#define	SMP_FR_ZONE_LOCK_VIOLATION	0x23
120#define	SMP_FR_NOT_ACTIVATED		0x24
121#define	SMP_FR_ZG_OUT_OF_RANGE		0x25
122#define	SMP_FR_NO_PHYS_PRESENCE		0x26
123#define	SMP_FR_SAVING_NOT_SUP		0x27
124#define	SMP_FR_SRC_ZONE_DNE		0x28
125#define	SMP_FR_DISABLED_PWD_NOT_SUP	0x29
126
127/*
128 * REPORT GENERAL request and response, current as of SPL Revision 7.
129 */
130struct smp_report_general_request
131{
132	uint8_t	frame_type;
133	uint8_t	function;
134	uint8_t	response_len;
135	uint8_t	request_len;
136	uint8_t	crc[4];
137};
138
139struct smp_report_general_response
140{
141	uint8_t	frame_type;
142	uint8_t	function;
143	uint8_t	function_result;
144	uint8_t	response_len;
145#define	SMP_RG_RESPONSE_LEN		0x11
146	uint8_t	expander_change_count[2];
147	uint8_t	expander_route_indexes[2];
148	uint8_t	long_response;
149#define	SMP_RG_LONG_RESPONSE		0x80
150	uint8_t	num_phys;
151	uint8_t	config_bits0;
152#define	SMP_RG_TABLE_TO_TABLE_SUP	0x80
153#define	SMP_RG_ZONE_CONFIGURING		0x40
154#define	SMP_RG_SELF_CONFIGURING		0x20
155#define	SMP_RG_STP_CONTINUE_AWT		0x10
156#define	SMP_RG_OPEN_REJECT_RETRY_SUP	0x08
157#define	SMP_RG_CONFIGURES_OTHERS	0x04
158#define	SMP_RG_CONFIGURING		0x02
159#define	SMP_RG_EXT_CONFIG_ROUTE_TABLE	0x01
160	uint8_t	reserved0;
161	uint8_t	encl_logical_id[8];
162	uint8_t	reserved1[8];
163	uint8_t	reserved2[2];
164	uint8_t	stp_bus_inact_time_limit[2];
165	uint8_t	stp_max_conn_time_limit[2];
166	uint8_t	stp_smp_it_nexus_loss_time[2];
167	uint8_t	config_bits1;
168#define	SMP_RG_NUM_ZONE_GROUPS_MASK	0xc0
169#define	SMP_RG_NUM_ZONE_GROUPS_SHIFT	6
170#define	SMP_RG_ZONE_LOCKED		0x10
171#define	SMP_RG_PP_SUPPORTED		0x08
172#define	SMP_RG_PP_ASSERTED		0x04
173#define	SMP_RG_ZONING_SUPPORTED		0x02
174#define	SMP_RG_ZONING_ENABLED		0x01
175	uint8_t	config_bits2;
176#define	SMP_RG_SAVING			0x10
177#define	SMP_RG_SAVING_ZM_PWD_SUP	0x08
178#define	SMP_RG_SAVING_PHY_INFO_SUP	0x04
179#define	SMP_RG_SAVING_ZPERM_TAB_SUP	0x02
180#define	SMP_RG_SAVING_ZENABLED_SUP	0x01
181	uint8_t	max_num_routed_addrs[2];
182	uint8_t	active_zm_address[8];
183	uint8_t	zone_lock_inact_time_limit[2];
184	uint8_t	reserved3[2];
185	uint8_t	reserved4;
186	uint8_t	first_encl_conn_el_index;
187	uint8_t	num_encl_conn_el_indexes;
188	uint8_t	reserved5;
189	uint8_t	reduced_functionality;
190#define	SMP_RG_REDUCED_FUNCTIONALITY	0x80
191	uint8_t	time_to_reduced_func;
192	uint8_t	initial_time_to_reduced_func;
193	uint8_t	max_reduced_func_time;
194	uint8_t	last_sc_stat_desc_index[2];
195	uint8_t	max_sc_stat_descs[2];
196	uint8_t	last_phy_evl_desc_index[2];
197	uint8_t	max_stored_pel_descs[2];
198	uint8_t	stp_reject_to_open_limit[2];
199	uint8_t	reserved6[2];
200	uint8_t	crc[4];
201};
202
203/*
204 * REPORT MANUFACTURER INFORMATION request and response, current as of SPL
205 * Revision 7.
206 */
207struct smp_report_manuf_info_request
208{
209	uint8_t	frame_type;
210	uint8_t	function;
211	uint8_t	response_len;
212	uint8_t	request_len;
213#define	SMP_RMI_REQUEST_LEN		0x00
214	uint8_t	crc[4];
215};
216
217struct smp_report_manuf_info_response
218{
219	uint8_t	frame_type;
220	uint8_t	function;
221	uint8_t	function_result;
222	uint8_t	response_len;
223#define	SMP_RMI_RESPONSE_LEN		0x0e
224	uint8_t	expander_change_count[2];
225	uint8_t	reserved0[2];
226	uint8_t	sas_11_format;
227#define	SMP_RMI_SAS11_FORMAT		0x01
228	uint8_t	reserved1[3];
229	uint8_t	vendor[8];
230	uint8_t	product[16];
231	uint8_t	revision[4];
232	uint8_t	comp_vendor[8];
233	uint8_t	comp_id[2];
234	uint8_t	comp_revision;
235	uint8_t	reserved2;
236	uint8_t	vendor_specific[8];
237	uint8_t	crc[4];
238};
239
240/*
241 * DISCOVER request and response, current as of SPL Revision 7.
242 */
243struct smp_discover_request
244{
245	uint8_t	frame_type;
246	uint8_t	function;
247	uint8_t response_len;
248	uint8_t request_len;
249#define	SMP_DIS_REQUEST_LEN		0x02
250	uint8_t reserved0[4];
251	uint8_t	ignore_zone_group;
252#define	SMP_DIS_IGNORE_ZONE_GROUP	0x01
253	uint8_t	phy;
254	uint8_t	reserved1[2];
255	uint8_t	crc[4];
256};
257
258struct smp_discover_response
259{
260	uint8_t	frame_type;
261	uint8_t	function;
262	uint8_t	function_result;
263	uint8_t	response_len;
264#define	SMP_DIS_RESPONSE_LEN		0x20
265	uint8_t	expander_change_count[2];
266	uint8_t	reserved0[3];
267	uint8_t	phy;
268	uint8_t	reserved1[2];
269	uint8_t	attached_device;
270#define	SMP_DIS_AD_TYPE_MASK		0x70
271#define	SMP_DIS_AD_TYPE_NONE		0x00
272#define	SMP_DIS_AD_TYPE_SAS_SATA	0x10
273#define	SMP_DIS_AD_TYPE_EXP		0x20
274#define	SMP_DIS_AD_TYPE_EXP_OLD		0x30
275#define	SMP_DIS_ATTACH_REASON_MASK	0x0f
276	uint8_t	neg_logical_link_rate;
277#define	SMP_DIS_LR_MASK			0x0f
278#define	SMP_DIS_LR_DISABLED		0x01
279#define	SMP_DIS_LR_PHY_RES_PROB		0x02
280#define	SMP_DIS_LR_SPINUP_HOLD		0x03
281#define	SMP_DIS_LR_PORT_SEL		0x04
282#define	SMP_DIS_LR_RESET_IN_PROG	0x05
283#define	SMP_DIS_LR_UNSUP_PHY_ATTACHED	0x06
284#define	SMP_DIS_LR_G1_15GBPS		0x08
285#define	SMP_DIS_LR_G2_30GBPS		0x09
286#define	SMP_DIS_LR_G3_60GBPS		0x0a
287	uint8_t	config_bits0;
288#define	SMP_DIS_ATTACHED_SSP_INIT	0x08
289#define	SMP_DIS_ATTACHED_STP_INIT	0x04
290#define	SMP_DIS_ATTACHED_SMP_INIT	0x02
291#define	SMP_DIS_ATTACHED_SATA_HOST	0x01
292	uint8_t	config_bits1;
293#define	SMP_DIS_ATTACHED_SATA_PORTSEL	0x80
294#define	SMP_DIS_STP_BUFFER_TOO_SMALL	0x10
295#define	SMP_DIS_ATTACHED_SSP_TARG	0x08
296#define	SMP_DIS_ATTACHED_STP_TARG	0x04
297#define	SMP_DIS_ATTACHED_SMP_TARG	0x02
298#define	SMP_DIS_ATTACHED_SATA_DEV	0x01
299	uint8_t	sas_address[8];
300	uint8_t	attached_sas_address[8];
301	uint8_t	attached_phy_id;
302	uint8_t	config_bits2;
303#define	SMP_DIS_ATT_SLUMB_CAP		0x10
304#define	SMP_DIS_ATT_PAR_CAP		0x08
305#define	SMP_DIS_ATT_IN_ZPSDS_PER	0x04
306#define	SMP_DIS_ATT_REQ_IN_ZPSDS	0x02
307#define	SMP_DIS_ATT_BREAK_RPL_CAP	0x01
308	uint8_t	reserved2[6];
309	uint8_t	link_rate0;
310#define	SMP_DIS_PROG_MIN_LR_MASK	0xf0
311#define	SMP_DIS_PROG_MIN_LR_SHIFT	4
312#define	SMP_DIS_HARD_MIN_LR_MASK	0x0f
313	uint8_t	link_rate1;
314#define	SMP_DIS_PROG_MAX_LR_MAX		0xf0
315#define	SMP_DIS_PROG_MAX_LR_SHIFT	4
316#define	SMP_DIS_HARD_MAX_LR_MASK	0x0f
317	uint8_t	phy_change_count;
318	uint8_t	pp_timeout;
319#define	SMP_DIS_VIRTUAL_PHY		0x80
320#define	SMP_DIS_PP_TIMEOUT_MASK		0x0f
321	uint8_t	routing_attr;
322	uint8_t	conn_type;
323	uint8_t	conn_el_index;
324	uint8_t	conn_phys_link;
325	uint8_t	config_bits3;
326#define	SMP_DIS_PHY_POW_COND_MASK	0xc0
327#define	SMP_DIS_PHY_POW_COND_SHIFT	6
328#define	SMP_DIS_SAS_SLUMB_CAP		0x08
329#define	SMP_DIS_SAS_PART_CAP		0x04
330#define	SMP_DIS_SATA_SLUMB_CAP		0x02
331#define	SMP_DIS_SATA_PART_CAP		0x01
332	uint8_t	config_bits4;
333#define	SMP_DIS_SAS_SLUMB_ENB		0x08
334#define	SMP_DIS_SAS_PART_ENB		0x04
335#define	SMP_DIS_SATA_SLUMB_ENB		0x02
336#define	SMP_DIS_SATA_PART_ENB		0x01
337	uint8_t	vendor_spec[2];
338	uint8_t	attached_dev_name[8];
339	uint8_t	config_bits5;
340#define	SMP_DIS_REQ_IN_ZPSDS_CHG	0x40
341#define	SMP_DIS_IN_ZPSDS_PER		0x20
342#define	SMP_DIS_REQ_IN_ZPSDS		0x10
343#define	SMP_DIS_ZG_PER			0x04
344#define	SMP_DIS_IN_ZPSDS		0x02
345#define	SMP_DIS_ZONING_ENB		0x01
346	uint8_t	reserved3[2];
347	uint8_t	zone_group;
348	uint8_t	self_config_status;
349	uint8_t	self_config_levels_comp;
350	uint8_t	reserved4[2];
351	uint8_t	self_config_sas_addr[8];
352	uint8_t	prog_phy_cap[4];
353	uint8_t	current_phy_cap[4];
354	uint8_t	attached_phy_cap[4];
355	uint8_t	reserved5[6];
356	uint8_t	neg_phys_link_rate;
357#define	SMP_DIS_REASON_MASK		0xf0
358#define	SMP_DIS_REASON_SHIFT		4
359#define	SMP_DIS_PHYS_LR_MASK		0x0f
360	uint8_t	config_bits6;
361#define	SMP_DIS_OPTICAL_MODE_ENB	0x04
362#define	SMP_DIS_NEG_SSC			0x02
363#define	SMP_DIS_HW_MUX_SUP		0x01
364	uint8_t	config_bits7;
365#define	SMP_DIS_DEF_IN_ZPSDS_PER	0x20
366#define	SMP_DIS_DEF_REQ_IN_ZPSDS	0x10
367#define	SMP_DIS_DEF_ZG_PER		0x04
368#define	SMP_DIS_DEF_ZONING_ENB		0x01
369	uint8_t	reserved6;
370	uint8_t	reserved7;
371	uint8_t	default_zone_group;
372	uint8_t	config_bits8;
373#define	SMP_DIS_SAVED_IN_ZPSDS_PER	0x20
374#define	SMP_DIS_SAVED_REQ_IN_SPSDS	0x10
375#define	SMP_DIS_SAVED_ZG_PER		0x04
376#define	SMP_DIS_SAVED_ZONING_ENB	0x01
377	uint8_t	reserved8;
378	uint8_t	reserved9;
379	uint8_t	saved_zone_group;
380	uint8_t	config_bits9;
381#define	SMP_DIS_SHADOW_IN_ZPSDS_PER	0x20
382#define	SMP_DIS_SHADOW_IN_REQ_IN_ZPSDS	0x10
383#define	SMP_DIS_SHADOW_ZG_PER		0x04
384	uint8_t reserved10;
385	uint8_t reserved11;
386	uint8_t	shadow_zone_group;
387	uint8_t	device_slot_num;
388	uint8_t	device_slot_group_num;
389	uint8_t	device_slot_group_out_conn[6];
390	uint8_t	stp_buffer_size[2];
391	uint8_t	reserved12;
392	uint8_t	reserved13;
393	uint8_t	crc[4];
394};
395
396/*
397 * PHY CONTROL request and response.  Current as of SPL Revision 7.
398 */
399struct smp_phy_control_request
400{
401	uint8_t	frame_type;
402	uint8_t	function;
403	uint8_t response_len;
404#define	SMP_PC_RESPONSE_LEN		0x00
405	uint8_t request_len;
406#define	SMP_PC_REQUEST_LEN		0x09
407	uint8_t expected_exp_chg_cnt[2];
408	uint8_t reserved0[3];
409	uint8_t phy;
410	uint8_t phy_operation;
411#define	SMP_PC_PHY_OP_NOP		0x00
412#define	SMP_PC_PHY_OP_LINK_RESET	0x01
413#define	SMP_PC_PHY_OP_HARD_RESET	0x02
414#define	SMP_PC_PHY_OP_DISABLE		0x03
415#define	SMP_PC_PHY_OP_CLEAR_ERR_LOG	0x05
416#define	SMP_PC_PHY_OP_CLEAR_AFFILIATON	0x06
417#define	SMP_PC_PHY_OP_TRANS_SATA_PSS	0x07
418#define	SMP_PC_PHY_OP_CLEAR_STP_ITN_LS	0x08
419#define	SMP_PC_PHY_OP_SET_ATT_DEV_NAME	0x09
420	uint8_t update_pp_timeout;
421#define	SMP_PC_UPDATE_PP_TIMEOUT	0x01
422	uint8_t reserved1[12];
423	uint8_t attached_device_name[8];
424	uint8_t prog_min_phys_link_rate;
425#define	SMP_PC_PROG_MIN_PL_RATE_MASK	0xf0
426#define	SMP_PC_PROG_MIN_PL_RATE_SHIFT	4
427	uint8_t prog_max_phys_link_rate;
428#define	SMP_PC_PROG_MAX_PL_RATE_MASK	0xf0
429#define	SMP_PC_PROG_MAX_PL_RATE_SHIFT	4
430	uint8_t	config_bits0;
431#define	SMP_PC_SP_NC			0x00
432#define	SMP_PC_SP_DISABLE		0x02
433#define	SMP_PC_SP_ENABLE		0x01
434#define	SMP_PC_SAS_SLUMBER_NC		0x00
435#define	SMP_PC_SAS_SLUMBER_DISABLE	0x80
436#define	SMP_PC_SAS_SLUMBER_ENABLE	0x40
437#define	SMP_PC_SAS_SLUMBER_MASK		0xc0
438#define	SMP_PC_SAS_SLUMBER_SHIFT	6
439#define	SMP_PC_SAS_PARTIAL_NC		0x00
440#define	SMP_PC_SAS_PARTIAL_DISABLE	0x20
441#define	SMP_PC_SAS_PARTIAL_ENABLE	0x10
442#define	SMP_PC_SAS_PARTIAL_MASK		0x30
443#define	SMP_PC_SAS_PARTIAL_SHIFT	4
444#define	SMP_PC_SATA_SLUMBER_NC		0x00
445#define	SMP_PC_SATA_SLUMBER_DISABLE	0x08
446#define	SMP_PC_SATA_SLUMBER_ENABLE	0x04
447#define	SMP_PC_SATA_SLUMBER_MASK	0x0c
448#define	SMP_PC_SATA_SLUMBER_SHIFT	2
449#define	SMP_PC_SATA_PARTIAL_NC		0x00
450#define	SMP_PC_SATA_PARTIAL_DISABLE	0x02
451#define	SMP_PC_SATA_PARTIAL_ENABLE	0x01
452#define	SMP_PC_SATA_PARTIAL_MASK	0x03
453#define	SMP_PC_SATA_PARTIAL_SHIFT	0
454	uint8_t	reserved2;
455	uint8_t	pp_timeout_value;
456#define	SMP_PC_PP_TIMEOUT_MASK		0x0f
457	uint8_t reserved3[3];
458	uint8_t	crc[4];
459};
460
461struct smp_phy_control_response
462{
463	uint8_t	frame_type;
464	uint8_t	function;
465	uint8_t	function_result;
466	uint8_t	response_len;
467#define	SMP_PC_RESPONSE_LEN		0x00
468	uint8_t crc[4];
469};
470
471__BEGIN_DECLS
472
473const char *smp_error_desc(int function_result);
474const char *smp_command_desc(uint8_t cmd_num);
475void smp_command_decode(uint8_t *smp_request, int request_len, struct sbuf *sb,
476			char *line_prefix, int first_line_len, int line_len);
477void smp_command_sbuf(struct ccb_smpio *smpio, struct sbuf *sb,
478		      char *line_prefix, int first_line_len, int line_len);
479
480#ifdef _KERNEL
481void smp_error_sbuf(struct ccb_smpio *smpio, struct sbuf *sb);
482#else /* !_KERNEL*/
483void smp_error_sbuf(struct cam_device *device, struct ccb_smpio *smpio,
484		    struct sbuf *sb);
485#endif /* _KERNEL/!_KERNEL */
486
487void smp_report_general_sbuf(struct smp_report_general_response *response,
488			     int response_len, struct sbuf *sb);
489
490void smp_report_manuf_info_sbuf(struct smp_report_manuf_info_response *response,
491				int response_len, struct sbuf *sb);
492
493void smp_report_general(struct ccb_smpio *smpio, uint32_t retries,
494			void (*cbfcnp)(struct cam_periph *, union ccb *),
495			struct smp_report_general_request *request,
496			int request_len, uint8_t *response, int response_len,
497			int long_response, uint32_t timeout);
498
499void smp_discover(struct ccb_smpio *smpio, uint32_t retries,
500		  void (*cbfcnp)(struct cam_periph *, union ccb *),
501		  struct smp_discover_request *request, int request_len,
502		  uint8_t *response, int response_len, int long_response,
503		  int ignore_zone_group, int phy, uint32_t timeout);
504
505void smp_report_manuf_info(struct ccb_smpio *smpio, uint32_t retries,
506			   void (*cbfcnp)(struct cam_periph *, union ccb *),
507			   struct smp_report_manuf_info_request *request,
508			   int request_len, uint8_t *response, int response_len,
509			   int long_response, uint32_t timeout);
510
511void smp_phy_control(struct ccb_smpio *smpio, uint32_t retries,
512		     void (*cbfcnp)(struct cam_periph *, union ccb *),
513		     struct smp_phy_control_request *request, int request_len,
514		     uint8_t *response, int response_len, int long_response,
515		     uint32_t expected_exp_change_count, int phy, int phy_op,
516		     int update_pp_timeout_val, uint64_t attached_device_name,
517		     int prog_min_prl, int prog_max_prl, int slumber_partial,
518		     int pp_timeout_value, uint32_t timeout);
519__END_DECLS
520
521#endif /*_SCSI_SMP_ALL_H*/