master
1/*
2 * miniport.h
3 *
4 * Type definitions for miniport drivers
5 *
6 * This file is part of the w32api package.
7 *
8 * Contributors:
9 * Created by Casper S. Hornstrup <chorns@users.sourceforge.net>
10 *
11 * THIS SOFTWARE IS NOT COPYRIGHTED
12 *
13 * This source code is offered for use in the public domain. You may
14 * use, modify or distribute it freely.
15 *
16 * This code is distributed in the hope that it will be useful but
17 * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
18 * DISCLAIMED. This includes but is not limited to warranties of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
20 *
21 */
22
23#ifndef _MINIPORT_
24#define _MINIPORT_
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30#define EMULATOR_READ_ACCESS 0x01
31#define EMULATOR_WRITE_ACCESS 0x02
32
33typedef enum _EMULATOR_PORT_ACCESS_TYPE {
34 Uchar,
35 Ushort,
36 Ulong
37} EMULATOR_PORT_ACCESS_TYPE, *PEMULATOR_PORT_ACCESS_TYPE;
38
39
40typedef struct _EMULATOR_ACCESS_ENTRY {
41 ULONG BasePort;
42 ULONG NumConsecutivePorts;
43 EMULATOR_PORT_ACCESS_TYPE AccessType;
44 UCHAR AccessMode;
45 UCHAR StringSupport;
46 PVOID Routine;
47} EMULATOR_ACCESS_ENTRY, *PEMULATOR_ACCESS_ENTRY;
48
49typedef VOID
50(NTAPI *PBANKED_SECTION_ROUTINE)(
51 IN ULONG ReadBank,
52 IN ULONG WriteBank,
53 IN PVOID Context);
54
55#ifndef __BROKEN__
56
57typedef enum _INTERFACE_TYPE {
58 InterfaceTypeUndefined = -1,
59 Internal,
60 Isa,
61 Eisa,
62 MicroChannel,
63 TurboChannel,
64 PCIBus,
65 VMEBus,
66 NuBus,
67 PCMCIABus,
68 CBus,
69 MPIBus,
70 MPSABus,
71 ProcessorInternal,
72 InternalPowerBus,
73 PNPISABus,
74 PNPBus,
75 Vmcs,
76 MaximumInterfaceType
77}INTERFACE_TYPE, *PINTERFACE_TYPE;
78
79typedef enum _KINTERRUPT_MODE {
80 LevelSensitive,
81 Latched
82} KINTERRUPT_MODE;
83
84typedef VOID (*PINTERFACE_REFERENCE)(PVOID Context);
85typedef VOID (*PINTERFACE_DEREFERENCE)(PVOID Context);
86
87typedef enum _BUS_DATA_TYPE {
88 ConfigurationSpaceUndefined = -1,
89 Cmos,
90 EisaConfiguration,
91 Pos,
92 CbusConfiguration,
93 PCIConfiguration,
94 VMEConfiguration,
95 NuBusConfiguration,
96 PCMCIAConfiguration,
97 MPIConfiguration,
98 MPSAConfiguration,
99 PNPISAConfiguration,
100 SgiInternalConfiguration,
101 MaximumBusDataType
102} BUS_DATA_TYPE, *PBUS_DATA_TYPE;
103
104typedef enum _DMA_WIDTH {
105 Width8Bits,
106 Width16Bits,
107 Width32Bits,
108 MaximumDmaWidth
109}DMA_WIDTH, *PDMA_WIDTH;
110
111typedef enum _DMA_SPEED {
112 Compatible,
113 TypeA,
114 TypeB,
115 TypeC,
116 TypeF,
117 MaximumDmaSpeed
118}DMA_SPEED, *PDMA_SPEED;
119
120typedef struct _INTERFACE {
121 USHORT Size;
122 USHORT Version;
123 PVOID Context;
124 PINTERFACE_REFERENCE InterfaceReference;
125 PINTERFACE_DEREFERENCE InterfaceDereference;
126} INTERFACE, *PINTERFACE;
127
128typedef enum _IRQ_DEVICE_POLICY {
129 IrqPolicyMachineDefault = 0,
130 IrqPolicyAllCloseProcessors,
131 IrqPolicyOneCloseProcessor,
132 IrqPolicyAllProcessorsInMachine,
133 IrqPolicySpecifiedProcessors,
134 IrqPolicySpreadMessagesAcrossAllProcessors
135} IRQ_DEVICE_POLICY, *PIRQ_DEVICE_POLICY;
136
137typedef enum _IRQ_PRIORITY {
138 IrqPriorityUndefined = 0,
139 IrqPriorityLow,
140 IrqPriorityNormal,
141 IrqPriorityHigh
142} IRQ_PRIORITY, *PIRQ_PRIORITY;
143
144typedef struct _IO_RESOURCE_DESCRIPTOR {
145 UCHAR Option;
146 UCHAR Type; // use CM_RESOURCE_TYPE
147 UCHAR ShareDisposition; // use CM_SHARE_DISPOSITION
148 UCHAR Spare1;
149 USHORT Flags; // use CM resource flag defines
150 USHORT Spare2; // align
151
152 union {
153 struct {
154 ULONG Length;
155 ULONG Alignment;
156 PHYSICAL_ADDRESS MinimumAddress;
157 PHYSICAL_ADDRESS MaximumAddress;
158 } Port;
159
160 struct {
161 ULONG Length;
162 ULONG Alignment;
163 PHYSICAL_ADDRESS MinimumAddress;
164 PHYSICAL_ADDRESS MaximumAddress;
165 } Memory;
166
167 struct {
168 ULONG MinimumVector;
169 ULONG MaximumVector;
170 IRQ_DEVICE_POLICY AffinityPolicy;
171 IRQ_PRIORITY PriorityPolicy;
172 KAFFINITY TargetedProcessors;
173 } Interrupt;
174
175 struct {
176 ULONG MinimumChannel;
177 ULONG MaximumChannel;
178 } Dma;
179
180 struct {
181 ULONG Length;
182 ULONG Alignment;
183 PHYSICAL_ADDRESS MinimumAddress;
184 PHYSICAL_ADDRESS MaximumAddress;
185 } Generic;
186
187 struct {
188 ULONG Data[3];
189 } DevicePrivate;
190
191 //
192 // Bus Number information.
193 //
194
195 struct {
196 ULONG Length;
197 ULONG MinBusNumber;
198 ULONG MaxBusNumber;
199 ULONG Reserved;
200 } BusNumber;
201
202 struct {
203 ULONG Priority; // use LCPRI_Xxx values in cfg.h
204 ULONG Reserved1;
205 ULONG Reserved2;
206 } ConfigData;
207
208 //
209 // The following structures provide descriptions
210 // for memory resource requirement greater than MAXULONG
211 //
212
213 struct {
214 ULONG Length40;
215 ULONG Alignment40;
216 PHYSICAL_ADDRESS MinimumAddress;
217 PHYSICAL_ADDRESS MaximumAddress;
218 } Memory40;
219
220 struct {
221 ULONG Length48;
222 ULONG Alignment48;
223 PHYSICAL_ADDRESS MinimumAddress;
224 PHYSICAL_ADDRESS MaximumAddress;
225 } Memory48;
226
227 struct {
228 ULONG Length64;
229 ULONG Alignment64;
230 PHYSICAL_ADDRESS MinimumAddress;
231 PHYSICAL_ADDRESS MaximumAddress;
232 } Memory64;
233
234 } u;
235
236} IO_RESOURCE_DESCRIPTOR, *PIO_RESOURCE_DESCRIPTOR;
237
238#include <guiddef.h>
239#endif /* ! __BROKEN__ */
240
241#ifdef __cplusplus
242}
243#endif
244
245#endif /* __MINIPORT_H */