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1/* Copyright (C) 1996-2025 Free Software Foundation, Inc.
2
3 This file is part of the GNU C Library.
4
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public License as
7 published by the Free Software Foundation; either version 2.1 of the
8 License, or (at your option) any later version.
9
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
14
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <https://www.gnu.org/licenses/>. */
18
19#ifndef _AARCH64_FPU_CONTROL_H
20#define _AARCH64_FPU_CONTROL_H
21
22#include <features.h>
23
24/* Macros for accessing the FPCR and FPSR. */
25
26#if __GNUC_PREREQ (6,0)
27# define _FPU_GETCW(fpcr) (fpcr = __builtin_aarch64_get_fpcr ())
28# define _FPU_SETCW(fpcr) __builtin_aarch64_set_fpcr (fpcr)
29# define _FPU_GETFPSR(fpsr) (fpsr = __builtin_aarch64_get_fpsr ())
30# define _FPU_SETFPSR(fpsr) __builtin_aarch64_set_fpsr (fpsr)
31#else
32# define _FPU_GETCW(fpcr) \
33 ({ \
34 __uint64_t __fpcr; \
35 __asm__ __volatile__ ("mrs %0, fpcr" : "=r" (__fpcr)); \
36 fpcr = __fpcr; \
37 })
38
39# define _FPU_SETCW(fpcr) \
40 ({ \
41 __uint64_t __fpcr = fpcr; \
42 __asm__ __volatile__ ("msr fpcr, %0" : : "r" (__fpcr)); \
43 })
44
45# define _FPU_GETFPSR(fpsr) \
46 ({ \
47 __uint64_t __fpsr; \
48 __asm__ __volatile__ ("mrs %0, fpsr" : "=r" (__fpsr)); \
49 fpsr = __fpsr; \
50 })
51
52# define _FPU_SETFPSR(fpsr) \
53 ({ \
54 __uint64_t __fpsr = fpsr; \
55 __asm__ __volatile__ ("msr fpsr, %0" : : "r" (__fpsr)); \
56 })
57#endif
58
59/* Reserved bits should be preserved when modifying register
60 contents. These two masks indicate which bits in each of FPCR and
61 FPSR should not be changed. */
62
63#define _FPU_RESERVED 0xfe0fe0f8
64#define _FPU_FPSR_RESERVED 0x0fffffe0
65
66#define _FPU_DEFAULT 0x00000000
67#define _FPU_FPSR_DEFAULT 0x00000000
68
69/* Layout of FPCR and FPSR:
70
71 | | | | | | | |
72 0 0 0 0 1 1 1 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0
73 s s s s s s s s s s s
74 c c c c c c c c c c c c
75 N Z C V Q A D F R R S S S L L L I U U I U O D I I U U I U O D I
76 C H N Z M M T T B E E E D N N X F F Z O D N N X F F Z O
77 P O O R R Z N N N E K K E E E E E C K K C C C C C
78 D D I I P
79 E E D D
80 E E
81 */
82
83#define _FPU_FPCR_RM_MASK 0xc00000
84
85#define _FPU_FPCR_MASK_IXE 0x1000
86#define _FPU_FPCR_MASK_UFE 0x0800
87#define _FPU_FPCR_MASK_OFE 0x0400
88#define _FPU_FPCR_MASK_DZE 0x0200
89#define _FPU_FPCR_MASK_IOE 0x0100
90
91#define _FPU_FPCR_IEEE \
92 (_FPU_DEFAULT | _FPU_FPCR_MASK_IXE \
93 | _FPU_FPCR_MASK_UFE | _FPU_FPCR_MASK_OFE \
94 | _FPU_FPCR_MASK_DZE | _FPU_FPCR_MASK_IOE)
95
96#define _FPU_FPSR_IEEE 0
97
98typedef unsigned int fpu_control_t;
99typedef unsigned int fpu_fpsr_t;
100
101/* Default control word set at startup. */
102extern fpu_control_t __fpu_control;
103
104#endif