master
1/*===------------- avx512ifmavlintrin.h - IFMA intrinsics ------------------===
2 *
3 *
4 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 * See https://llvm.org/LICENSE.txt for license information.
6 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *
8 *===-----------------------------------------------------------------------===
9 */
10#ifndef __IMMINTRIN_H
11#error "Never use <avx512ifmavlintrin.h> directly; include <immintrin.h> instead."
12#endif
13
14#ifndef __IFMAVLINTRIN_H
15#define __IFMAVLINTRIN_H
16
17/* Define the default attributes for the functions in this file. */
18#define __DEFAULT_FN_ATTRS128 \
19 __attribute__((__always_inline__, __nodebug__, \
20 __target__("avx512ifma,avx512vl,no-evex512"), \
21 __min_vector_width__(128)))
22#define __DEFAULT_FN_ATTRS256 \
23 __attribute__((__always_inline__, __nodebug__, \
24 __target__("avx512ifma,avx512vl,no-evex512"), \
25 __min_vector_width__(256)))
26
27#define _mm_madd52hi_epu64(X, Y, Z) \
28 ((__m128i)__builtin_ia32_vpmadd52huq128((__v2di)(X), (__v2di)(Y), \
29 (__v2di)(Z)))
30
31#define _mm256_madd52hi_epu64(X, Y, Z) \
32 ((__m256i)__builtin_ia32_vpmadd52huq256((__v4di)(X), (__v4di)(Y), \
33 (__v4di)(Z)))
34
35#define _mm_madd52lo_epu64(X, Y, Z) \
36 ((__m128i)__builtin_ia32_vpmadd52luq128((__v2di)(X), (__v2di)(Y), \
37 (__v2di)(Z)))
38
39#define _mm256_madd52lo_epu64(X, Y, Z) \
40 ((__m256i)__builtin_ia32_vpmadd52luq256((__v4di)(X), (__v4di)(Y), \
41 (__v4di)(Z)))
42
43static __inline__ __m128i __DEFAULT_FN_ATTRS128
44_mm_mask_madd52hi_epu64 (__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y)
45{
46 return (__m128i)__builtin_ia32_selectq_128(__M,
47 (__v2di)_mm_madd52hi_epu64(__W, __X, __Y),
48 (__v2di)__W);
49}
50
51static __inline__ __m128i __DEFAULT_FN_ATTRS128
52_mm_maskz_madd52hi_epu64 (__mmask8 __M, __m128i __X, __m128i __Y, __m128i __Z)
53{
54 return (__m128i)__builtin_ia32_selectq_128(__M,
55 (__v2di)_mm_madd52hi_epu64(__X, __Y, __Z),
56 (__v2di)_mm_setzero_si128());
57}
58
59static __inline__ __m256i __DEFAULT_FN_ATTRS256
60_mm256_mask_madd52hi_epu64 (__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y)
61{
62 return (__m256i)__builtin_ia32_selectq_256(__M,
63 (__v4di)_mm256_madd52hi_epu64(__W, __X, __Y),
64 (__v4di)__W);
65}
66
67static __inline__ __m256i __DEFAULT_FN_ATTRS256
68_mm256_maskz_madd52hi_epu64 (__mmask8 __M, __m256i __X, __m256i __Y, __m256i __Z)
69{
70 return (__m256i)__builtin_ia32_selectq_256(__M,
71 (__v4di)_mm256_madd52hi_epu64(__X, __Y, __Z),
72 (__v4di)_mm256_setzero_si256());
73}
74
75static __inline__ __m128i __DEFAULT_FN_ATTRS128
76_mm_mask_madd52lo_epu64 (__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y)
77{
78 return (__m128i)__builtin_ia32_selectq_128(__M,
79 (__v2di)_mm_madd52lo_epu64(__W, __X, __Y),
80 (__v2di)__W);
81}
82
83static __inline__ __m128i __DEFAULT_FN_ATTRS128
84_mm_maskz_madd52lo_epu64 (__mmask8 __M, __m128i __X, __m128i __Y, __m128i __Z)
85{
86 return (__m128i)__builtin_ia32_selectq_128(__M,
87 (__v2di)_mm_madd52lo_epu64(__X, __Y, __Z),
88 (__v2di)_mm_setzero_si128());
89}
90
91static __inline__ __m256i __DEFAULT_FN_ATTRS256
92_mm256_mask_madd52lo_epu64 (__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y)
93{
94 return (__m256i)__builtin_ia32_selectq_256(__M,
95 (__v4di)_mm256_madd52lo_epu64(__W, __X, __Y),
96 (__v4di)__W);
97}
98
99static __inline__ __m256i __DEFAULT_FN_ATTRS256
100_mm256_maskz_madd52lo_epu64 (__mmask8 __M, __m256i __X, __m256i __Y, __m256i __Z)
101{
102 return (__m256i)__builtin_ia32_selectq_256(__M,
103 (__v4di)_mm256_madd52lo_epu64(__X, __Y, __Z),
104 (__v4di)_mm256_setzero_si256());
105}
106
107
108#undef __DEFAULT_FN_ATTRS128
109#undef __DEFAULT_FN_ATTRS256
110
111#endif